Offer summary
Qualifications:
Minimum BSEE or BSCE, MSEE preferred, 5+ years of FPGA development experience, Proficient in Python and System Verilog, Experience with AMD Xilinx RFSoC, Strong problem-solving and detail-oriented skills.Key responsabilities:
- Design low-latency System Verilog modules
- Contribute to architecture discussions with team
- Manage a complex tool-chain and verification environment
- Write efficient System Verilog code as a team
- Troubleshoot, debug, and develop unit tests