Offer summary
Qualifications:
PhD/Master/Degree in Electrical/Electronic Engineering or Micro Electronics/Physics, 2 to 4 years experience for Junior Engineer, 5 to 7 years for Senior Engineer, Hands-on experience in analog layout, Experience with Cadence tools preferred.Key responsabilities:
- Participate in floor planning and routing of chips
- Perform layout verification and troubleshoot results
- Supervise the layout team on projects
- Collaborate with cross-functional teams to deliver products