Offer summary
Qualifications:
Bachelor's degree in Electrical Engineering or related field, 5+ years of professional experience with VHDL and/or Verilog.Key responsabilities:
- Architect, design and integrate HDL solutions for Xilinx FPGAs
- Perform timing closure and create maintainable, extensible solutions
- Integrate and test new designs, participate in collaborative cross-functional reviews
- Automate workflows using Python, TCL and other scripting languages