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Analog Layout_Swathy_Capgemini

Remote: 
Full Remote
Contract: 
Fixed term
Work from: 
India

Offer summary

Qualifications:

Hands-on experience in developing Analog Layout and IO layout design., Good exposure to FinFet layouts in lower nodes and expertise in Cadence and Calibre DRC/LVS., Knowledge of ESD, LUP, antenna layout challenges, and EMIR issue analysis., Ability to work independently and communicate effectively with global engineering teams..

Key responsibilities:

  • Develop and design Analog Layout and IO layout.
  • Utilize Cadence and Calibre tools for DRC and LVS verification.
  • Analyze and fix ESD, LUP, and antenna layout challenges.
  • Collaborate with team members and global engineering teams to complete projects.

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CodersBrain SME https://www.codersbrain.com/
201 - 500 Employees
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Job description

Location : Bangalore

Job Description
·      Hands on experience in developing Analog Layout / IO layout design.
·      Good exposure on FinFet layouts in lower nodes. Expertise in using the best and latest features of Cadence and Calibre DRC/LVS. 
·      Good exposure on ESD, LUP, antenna layout challenges and analysing/fixing EMIR issues. 
·      Capable of working independently and with team and getting work done. 
·      The ability to work & communicate effectively with global engineering teams.

·      Able to handle Analog Layout Design, EDA Tools, DRC, LVS, Calibre, FinFet.

Secondary Skills
·      Knowledge in Cadence, Virtuoso, Physical verification.

Required profile

Experience

Spoken language(s):
English
Check out the description to know which languages are mandatory.

Hard Skills

Analog DesignCadence VirtuosoJFET (Transistor Types)VirtuozzoIdentity And Access Management

Other Skills

  • Teamwork
  • Communication
Are you interested?

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