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SOC Physical design_Rakesh_Capgemini

Remote: 
Full Remote
Contract: 
Fixed term
Work from: 
India

Offer summary

Qualifications:

4-15 years of experience in SOC physical design., Proficient in Synopsys ICC, Cadence, or Mentor Olympus tools., Expertise in timing closure, physical verification, and design automation., Familiarity with Tcl/PERL scripting is a plus..

Key responsibilities:

  • Manage SOC level floorplanning, partitioning, and timing budget generation.
  • Ensure timing closure of high frequency blocks and handle signoff closure.
  • Conduct physical verification and implement SI prevention techniques.
  • Oversee SOC PNR activities and support synthesis and IR drop analysis.

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Job description

Location : Bangalore

SOC Physical design : 4 – 15 years
Location: Bangalore

Skills:
Soc level floorplanning, partitioning, timing budget generations, power planning, SOC PnR, CTS, block integration
Handling timing closure of high frequency blocks.
Expertise in signoff closure – Timing with SI and OCV, Power, IR and physical verification at both block and chip level.
Understanding constraints and fixing techniques.
Experience in physical verification
Understanding SI prevention, fixing methodology and implementation.
Proficient in Synopsys ICC or Cadence or Mentor Olympus and Atoptech tool set.
Experience in Design Automation and UNIX system.
Experience in Tcl/ PERL is a plus.
 
Primary Skills:
Able to handle Soc PNR activities , SOC timing closure and SOC physical verification
 
Secondary Skills:
Able to handle SOC Synthesis, SOC IR drop, SOC Lec, SOC CLP

Required profile

Experience

Spoken language(s):
English
Check out the description to know which languages are mandatory.

Hard Skills

Identity And Access ManagementCadence VirtuosoConstraint ManagementData PartitioningElectronic DesignEnergy ManagementUnixSpace PlanningPerl (Programming Language)Tcl (Programming Language)
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