FPGA Digital Design Engineering Intern (September 2025)

Remote: 
Full Remote
Contract: 
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Offer summary

Qualifications:

Currently enrolled in an Electrical or Computer Engineering degree program or equivalent., Experience with Verilog, SystemVerilog, or VHDL, specifically working in SystemVerilog., Strong skills in C++ and embedded programming are a plus., Familiarity with DSP algorithms and scripting languages like Python or bash is advantageous..

Key responsabilities:

  • Maintain and enhance the FPGA code base for SDR and SDN functionalities.
  • Design custom IP for new satellite and ground station features.
  • Integrate support for new sensors and communication interfaces such as SPI and I2C.
  • Work with high-speed FPGA interfaces like JESD204b and 10G Ethernet.

Kepler Communications Inc. logo
Kepler Communications Inc. Telecommunication Services Scaleup https://kepler.space/
51 - 200 Employees
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Job description

Kepler is on an audacious mission to deliver Internet connectivity to space, creating the infrastructure to support the rapidly increasing data needs of the space economy. With 23 satellites launched to date and our optical constellation on the horizon, our ambition is to improve access to space-generated data, whether in LEO, MEO, GEO, or beyond! Kepler is hard at work innovating and continuing to grow and expand our most important asset – the Team! 

We invest heavily to deliver the best products to our customers, and so we’re on the hunt for a top-tier FPGA Digital Designer Engineering Intern. The RTL code you write will contribute to our new generation of satellites and earth stations. 

Responsibilities
  • Maintain and add new functionality to our FPGA code base, including code to control and test our SDR (software-defined radio) and SDN (software-defined network); 
  • Design custom IP for new features of both Kepler's satellites and ground stations; 
  • Add support for new sensors/communication interfaces (such as SPI, I2C, UART);  
  • Work with high-speed FPGA interfaces (e.g. JESD204b, 10G Ethernet, Aurora). 

  • Requirements
  • 2+ years in an Electrical or Computer Engineering degree program, or equivalent; 
  • Experience with Verilog, SystemVerilog, or VHDL. (You will be working in SystemVerilog);
  • Currently enrolled in an undergraduate program at a Canadian post-secondary institution.
  • Available for a full-time, 4–16 month internship beginning September 2025;
  • Opportunity to work out of our new Toronto office! This position can be based onsite at our Toronto office (24 Ward Street), hybrid, or remote, depending on the candidate’s location.

  • Bonus Points
  • Experience with DSP (digital signal processing) algorithms; 
  • Strong skills with C++ and embedded programming;
  • Strong scripting experience (e.g. bash, Python, Tcl, etc.); 
  • Relevant experience through hobbies or a university design team. 
  • Kepler Communications is committed to fostering an inclusive, accessible environment, where all employees and customers feel valued, respected and supported. We welcome applications from: Women, Aboriginal persons, persons with disabilities, ethnic minorities, visible minorities, people who identify as LGBTQ+ and others who may contribute to diversification in our workplace.

    As part of our commitment to accessibility for all persons with disabilities, Kepler will, upon the request of the applicant, provide accommodation during the recruitment process to ensure equal access to applicants with disabilities. Please contact our People & Culture team, through our Career Page to make your accommodation needs known and we will consult with you to ensure suitable accommodation is provided.

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    Industry :
    Telecommunication Services
    Spoken language(s):
    English
    Check out the description to know which languages are mandatory.

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